I2C communication protocol: understand I2C Primer, PMBus and SMBus

[Guide]I2C, namely Inter-Integrated Circuit, is a commonly used serial communication protocol used to establish communication between devices, especially between two or more different circuits. I2C Primer is the most commonly used I2C. This article will introduce I2The basic characteristics and standards of C Primer, and focus on how to use the protocol correctly in the communication realization process. From I2Starting from the basic principles of C, we will introduce the availability of its variant subsets-System Management Bus (SMBus) and Power Management Bus (PMBus) and the difference between the two. Each of these three protocols has its own special function, designed to meet different customer needs.

Why is it important?

I2C is helpful for designers to establish simple, two-way, and flexible communication between many nodes in the system. I2C uses only two bidirectional wires to send and receive information, thereby reducing complexity. It also allows designers to configure communication between multiple master node system ICs. I2C is also very beneficial to developers of management systems and power supplies, allowing them to create high-quality products in the shortest possible time.

“Communication (communication) is useful for those who are committed to communication (communication).”

—John Powell

Communication protocols play an important role in organizing communication between devices. It is designed in different ways based on system requirements. This type of agreement has clear rules that are agreed upon for successful communication.

If you have ever built a system using things like LED displays, sensors, or even accelerometer modules, then you have probably used I2C. I2C supports the feature that multiple nodes are connected to a single main device and multiple main devices are connected to multiple nodes. This feature is very useful if you want to make the most of it, let a microcontroller record data to a single memory card, or display text to a single LCD.

Except for the most commonly used I2C Primer, I2There are also two variants of C that focus on system and power applications, called the system management bus (SMBus) and power management bus (PMBus).

By definition, Inter-Integrated Circuit (I2C)-also known as Inter IC-is a hardware communication protocol that performs synchronous communication through a multi-master, multi-node, and serial communication bus. Synchronous communication means that two (or more) devices that exchange data share a common clock line. I2C is widely used to connect low-speed peripheral ICs to processors and microcontrollers. I2The C bus is designed by Philips, which allows easy communication between devices on the same circuit board.

I2C Primer

interface

Use a serial data (SDA) line, a serial clock (SCL) line, and a common ground to carry all communications, minimizing connections.

I2C communication protocol: understand I2C Primer, PMBus and SMBus

Figure 1. Integrated circuits communicate directly with each other

Every I2The C device has two lines:

● SDA is a line for the host device and node to send and receive data.

● SCL is the line that carries the clock signal. SCL always consists of I2C is generated by the master device. The specification has a minimum period requirement for the low phase and high phase of the clock signal.

I2The C bus uses only two bidirectional lines: SDA and SCL of each device are used for simple inter-IC communication.

I2C communication protocol: understand I2C Primer, PMBus and SMBus

Figure 2. I2C Pull-up resistor connection

The most important thing to note about the hardware is to add pull-up resistors on SDA and SCL. I2The C device is connected to the bus through an open-collector or open-drain pin, pulling the line low. When there is no data transmission, I2The C bus is in a high-level idle state; the line is passively pulled high. To transmit data, you must switch the line, that is, pull it low and then release (change to high again). Data bits are transferred on the falling edge of the clock.

The open-drain output requires a pull-up resistor (R in Figure 2p) To output the high level correctly. The pull-up resistor is connected to the output pin and the output voltage required for high level (V in Figure 2DD)between.

For VCCAnd VDD (5 V) typical value, 4700 Ω is the most commonly used pull-up resistor value.

For reference, the capacitance range of shielded 2 AWG twisted-pair cable is 100 pF⁄m to 240 pF⁄m. Therefore, I2The maximum bus length of the C link is approximately 1 meter (at 100 kBaud) or 10 meters (at 10 kBaud). The capacitance of an unshielded cable is usually much smaller, but it can only be used in other shielded enclosures.

Table 1 summarizes I2The key feature of C.

Table 1. I2C summary

I2C communication protocol: understand I2C Primer, PMBus and SMBus

Theoretically, the maximum number of nodes in the addressing mode is 27Or 210, But 16 addresses are reserved for special purposes.

I2C is synchronous, so the output of the bit is synchronized with the sampling of the bit through the clock signal shared between the master device and the node. The clock signal is always controlled by the master device.

Keep I2C node address

There are 16 reserved I2C address. These addresses correspond to one of two modes: 0000 XXX or 1111 XXX. Table 2 shows the I2C addresses reserved for special purposes.

Table 2. I2C reserved address

I2C communication protocol: understand I2C Primer, PMBus and SMBus

I2C working principle

I2C Data is transmitted in a message, and the message is broken down into data frames. The read and write protocol consists of an address frame (that is, the binary address of the node) and another data frame. The latter contains the transmitted data, start and stop conditions, repeated start bits, read/write bits, and the response between each data frame ⁄No answer bit.

Timing specification table

I2The C timing table is also very important, because engineers can use it to design ICs that are compatible with the bus requirements. Each data rate has its own timing specification, and the master device and node must comply with this specification in order to transmit data correctly.

Table 3 shows the symbols and parameters given on the timing specification table.

Table 3. I2C timing specification table example

I2C communication protocol: understand I2C Primer, PMBus and SMBus

I2C communication protocol: understand I2C Primer, PMBus and SMBus

Figure 3. I2C news

I2C Transmission sub-protocol

The transfer on the bus is either a read operation or a write operation. The read and write protocol is built on a series of sub-protocols, such as start and stop conditions, repeated start bits, address bytes, data transfer bits, and acknowledge/non-acknowledge bits.

Starting condition

As the name implies, the start condition always appears at the beginning of the transfer and is initiated by the master device. This is done to wake up idle node devices on the bus. The SDA line switches from a high level to a low level, and then the SCL line switches from a high level to a low level. See Figure 4.

Repeat start condition

Without issuing a stop condition, the start condition can be repeated during transmission. This is a special case called repeated start, which is used to change the data transmission direction, repeatedly try to transmit, synchronize multiple ICs, and even control serial memory. See Figure 5.

Address frame

The address frame contains a 7-bit or 10-bit sequence, depending on availability (see data sheet). See Figure 6.

Unlike SPI, I2C has no node to choose the line, so it needs another way to let the node know that data is being sent to it, rather than to another node. This is achieved through addressing. The address frame is always the first frame after the start bit in a new message.

The master device sends the address of the node it wants to communicate with to each node it is connected to. Then, each node compares the address sent by the master with its own address. If the address matches, it sends a low-voltage ACK bit to the master device. If the address does not match, the node does nothing and the SDA line remains high.

Read/write bit

The last bit of the address frame tells the node whether the master device wants to write data into it or receive data from it. If the master wants to send data to the node, the read/write bit is low. If the master device requests data from the node, this bit is at a high level. See Figure 7.

ACK⁄NACK bit

Each frame in the message is followed by an acknowledge/non-acknowledge bit. If an address frame or data frame is successfully received, the receiving device will return an ACK bit to the sender.

Legend: In the figure below, the white box represents the node, and the blue box represents the main device. See Figure 8.

I2C communication protocol: understand I2C Primer, PMBus and SMBus

Figure 4. Starting conditions

I2C communication protocol: understand I2C Primer, PMBus and SMBus

Figure 5. Repeated start conditions

I2C communication protocol: understand I2C Primer, PMBus and SMBus

Figure 6. Address frame

I2C communication protocol: understand I2C Primer, PMBus and SMBus

Figure 7. Read/write bits

I2C communication protocol: understand I2C Primer, PMBus and SMBus

Figure 8. Acknowledge/Not Acknowledge Bit

Data Frame

After the master device detects the ACK bit from the node, it is ready to send the first data frame. The data frame is always 8 bits long and is sent in MSB first. Each data frame is followed by an ACK⁄NACK bit to verify whether the frame has been successfully received. The master device or node (depending on who sends the data) must receive the ACK bit before it can send the next data frame. See Figure 9.

Stop condition

After sending all data frames, the master device can send a stop condition to the node to stop the transmission. The stop condition means that the voltage on the SCL line changes from a low level to a high level, and then when the SCL line remains high, the voltage on the SDA line changes from a low level to a high level.

After the SCL line switches from low level to high level, the SDA line switches from low level to high level. See Figure 10.

I2C transmission step: write

I about writing a single data2For an example of C transmission, see Figure 11.

step 1

The master device switches the SDA line from high level to low level, and then switches the SCL line from high level to low level to send the start condition to each connected node.

Step 2

The master device sends the 7-bit or 10-bit address of the node it wants to communicate with and the write operation bit to each node.

For example, the 7-bit address is 0x2D, ​​plus the write operation bit (equivalent to 0), the result will be 0x5A.

Step 3

Each node compares the address sent by the master device with its own address. If the address matches, the node will pull the SDA line low for one bit time to return an ACK bit. If the address from the master device does not match the node’s own address, the node keeps the SDA line high.

During the ninth pulse of SCL, pull down the SDA line to send the ACK bit, and keep the floating high level as NACK.

Step 4

The master device sends or receives data frames.

Step 5

After transmitting each data frame, the receiving device returns an ACK bit to the sender to confirm the successful reception of the frame.

Step 6

To stop data transmission, the master device should switch SCL to high level, and then switch SDA to high level to send a stop condition.

I2C communication protocol: understand I2C Primer, PMBus and SMBus

Figure 9. Data frame

I2C communication protocol: understand I2C Primer, PMBus and SMBus

Figure 10. Stop condition

I2C communication protocol: understand I2C Primer, PMBus and SMBus

Figure 11. I written to a single location2C example of transmitted data sheet

I2C communication protocol: understand I2C Primer, PMBus and SMBus

Figure 12. Reading the I of a single position2C example of transmitted data sheet

I2C data transmission steps: read

step 1

The master device switches the SDA line from high level to low level, and then switches the SCL line from high level to low level to send the start condition to each connected node.

Step 2

The master device sends the 7-bit or 10-bit address of the node it wants to communicate with and the write operation bit to each node.

For example, the 7-bit address is 0x2D, ​​plus the write operation bit (equivalent to 0), the result will be 0x5A.

Step 3

Each node compares the address sent by the master device with its own address. If the address matches, the node will pull the SDA line low for one bit time to return an ACK bit. If the address from the master device does not match the node’s own address, the node keeps the SDA line high.

Step 4

After the initial startup, addressing, and response, the master device already knows the target node and the address to which it points, so some devices have repeated start conditions to clean up the transaction.

Note: For reading purposes only!

Step 5

The master device sends the 7-bit or 10-bit address of the node it wants to communicate with and the read operation bit to each node.

For example, the 7-bit address is 0x2D, ​​plus the read operation bit (equivalent to 1), the result will be 0x5B.

Step 6

Each node compares the address sent by the master device with its own address. If the address matches, the node will pull the SDA line low for one bit time to return an ACK bit. If the address from the master device does not match the node’s own address, the node keeps the SDA line high.

Step 7

After getting the ACK bit, the master device receives the data frame from the node.

Step 8

After transmitting each data frame, the master device returns an ACK bit to the sender to confirm the successful reception of the frame, or if the read request has been completed, the master device returns NACK.

Step 9

To stop data transmission, the master device should switch SCL to high level, and then switch SDA to high level to send a stop condition.

Single master device and multiple nodes

I2C uses addressing, so a single master device can control multiple nodes. Using a 7-bit address can provide 128 (27) Unique addresses. It is rare to use 10-bit addresses, but 1024 (210) Unique addresses. To connect multiple nodes to a single master device, use 4.7 kΩ pull-up resistors to connect these nodes and connect the SDA and SCL lines to VCC.

Multiple master devices and multiple nodes

Multiple master devices can be connected to a single node or multiple nodes. If there are multiple master devices in the same system, problems will arise when two master devices compete to send or receive data via the SDA line at the same time.

To solve this problem, each master device needs to detect whether the SDA line is low or high before transmitting a message.

If the SDA line is low, it means that the bus is controlled by another master device and the master device should wait. If the SDA line is high, it can safely transmit messages. To connect multiple master devices to multiple nodes, use 4.7 kΩ pull-up resistors to connect the SDA and SCL lines to V as shown in Figure 13.CC.

I2C communication protocol: understand I2C Primer, PMBus and SMBus

Figure 13. Multiple master devices connecting multiple nodes

arbitration

Some I2C multi-master devices can be connected to the same I2C bus and run at the same time. By constantly monitoring SDA and SCL for start and stop conditions, they can determine whether the bus is free. If the bus is busy, the master device will delay the pending I2C transfers until the stop condition indicates that the bus is free again.

However, it may happen that two master devices start transmission at the same time. During the transmission, the master device continuously monitors SDA and SCL. If one of them detects that SDA is low and it should be high, then the master device will consider the other master device to be active and stop transmission immediately. This process is called arbitration. Both master devices will generate a start bit and continue their respective transmissions.

If the master device happens to select the same logic level, nothing will happen.

Once the master device tries to apply a different logic level, the master device that pulls the signal low will be declared the winner; the loser will detect a logic mismatch and therefore abandon the transmission.

Please take a moment to understand the simplicity and effectiveness of this arrangement:

● The winner continues to transmit without interruption-no data corruption, no drive contention, no need to restart the transaction.

● In theory, the loser can monitor the node address during the arbitration process, and if it happens to be the addressed node, it can respond appropriately.

● If the competing master devices all request data from the same node, the arbitration process will not interrupt any transaction unnecessarily-no mismatch will be detected, the node will output its data to the bus, and multiple master devices can receive To the data.

Clock stretching

Also called clock synchronization.

Note: I2The C specification does not specify any time-out conditions for clock stretching—that is, any device can maintain SCL as needed.

In i2In the C communication protocol, the clock speed and signal are always generated by the master device. I2The signal generated by the C master device provides synchronization between the master device and the node connection.

In some cases, nodes or sub-nodes are not working in full state and need to slow down before receiving the clock generated by the master device. This is achieved through a mechanism called “clock stretching”.

During the clock stretching period, in order to reduce the bus speed, the node is allowed to depress the clock. As for the master device, after it becomes a high level state, the clock signal must be read back. Then, it must wait until the line reaches a high state.

bandwidth

Although clock stretching is a common practice, it has an impact on bandwidth. When clock stretching is used, the total bandwidth of the shared bus may be significantly reduced. Even with this technology, the bus performance must still be reliable and fast. It is necessary to consider the estimated impact of using clock stretching, especially when multiple devices share I2In the case of C bus.

I2C communication protocol: understand I2C Primer, PMBus and SMBus

Figure 14. Microcontroller data sheet

Through clock stretching, I2The node C device can force the master device to enter the waiting state. When a node device needs more time to manage data, such as storing received data or preparing to send another byte of data, it may perform clock stretching. This usually happens after the node device receives and confirms the receipt of a byte of data.

Which I2Does C-node device need clock extension?

Whether or not clock stretching is required depends on the function of the node device. Here are two examples:

● Processing devices (such as microprocessors or microcontrollers) may require additional time to process interrupts, receive and manage data, and perform appropriate functions.

● Simpler devices (such as EEPROM) do not process data internally, so there is no need for clock extension to perform any functions.

I2C data sheet example overview

Different companies and manufacturers use different methods to create data manuals. Figure 13 shows a simple data sheet example and basic I2C details, including registers and Electronic specifications.

I2C communication protocol: understand I2C Primer, PMBus and SMBus

Figure 15. Microcontroller memory map

Table 4 shows the most commonly used I2C register. The name and description may vary from data sheet, but the function and usage are the same.

Table 4. I2C register description

I2C communication protocol: understand I2C Primer, PMBus and SMBus

I2The creation of C may vary depending on the use case. Table 5 shows the basic I2Examples of C driver API requirements.

Table 5. I2C-driven development

I2C communication protocol: understand I2C Primer, PMBus and SMBus

SMBus

As we all know, SMBus can be used in applications that require critical monitoring of parameters. Its most common applications are computer motherboards and embedded systems. For temperature, power supply voltage, fan monitoring and ⁄ or control integrated chip, it has additional monitoring specifications.

SMBus is a 2-wire bus, similar to the I developed by Philips in the 1980s2C bus. The two main signals are clock (SMBCLK) and data (SMBDAT). I2C Primer and SMBus are compatible with each other, but there are obvious differences, such as:

● The SMBus logic level threshold is fixed and not proportional to the power supply voltage of the device. Therefore, devices with different power supply voltages can run on the same Primer. For example, an SMBus may have multiple devices powered by 1.8 V, 3.3 V, and 5 V power supplies.

● They all run at the same speed up to 100 kHz, but I2C Primer is available in 400 kHz and 2 MHz versions.

● SMBus specifies the minimum clock speed and limits the amount that the clock can be stretched in a transaction. Violation of the timeout limit will cause all SMBus devices to reset their I⁄O logic to allow the bus to restart. This design enhances the robustness of the bus.

● The timeouts of the two are also different. I2C Primer does not have a timeout, while SMBus has a timeout—for a minimum clock speed of 10 kHz, a 35 ms timeout can be considered.

● Packet Error Checking (PEC) was originally defined for SMBus. Add a packet error code byte at the end of each transaction.

● Some of the remaining differences involve transmission type, alarm line, pause line, shutdown or power-up.

Every time an SMBus device receives its own address, it must acknowledge (ACK) no matter what it is doing. This is a clear requirement to ensure that the master device can accurately determine which devices on the bus are active.

All SMBus transactions are executed through one of the specified SMBus protocols.

SMBus also has an optional signal SMBALERT#, the node device can use this signal to quickly notify the main device or the system host, it has the information required by the main device, such as reporting fault conditions.

I2C communication protocol: understand I2C Primer, PMBus and SMBus

Figure 16. SMBus topology

SMBus pull-up circuit

I2C communication protocol: understand I2C Primer, PMBus and SMBus

Figure 17. SMBus pull-up circuit

SMBus address

The SMBus address has 7 binary digits, which are usually expressed as the first 4 digits, the last 3 digits, and the last letter b, such as 0001 110b. These addresses occupy the upper 7 bits of an 8-bit field on the bus. However, the lowest bit of this field has other meanings and does not belong to the scope of the SMBus address.

I2C communication protocol: understand I2C Primer, PMBus and SMBus

Figure 18. Node address

The 7-bit target address is sent from the master device to one or more devices on the bus (for example, via a broadcast address).

Please note that the start condition and stop condition are transitions, not bits, and the bit count is not displayed above the symbol. When displayed in the transaction diagram, the repeated start is also a transition, not a bit, and the bit count is not displayed above the symbol.

I2C communication protocol: understand I2C Primer, PMBus and SMBus

Figure 19. SMBus message

SMBus timing measurement

Table 6. SMBus parameters

I2C communication protocol: understand I2C Primer, PMBus and SMBus

PMBus: Redefine power management

In addition to SMBus, there is also a variant PMBus, which is an open standard power management protocol. This flexible and highly versatile standard allows communication between devices based on analog and digital technologies and provides true interoperability, thereby reducing the complexity of power system design and shortening the time to market.

PMBus is used for digital management of power supplies with power control and management devices. It has commands and structures that support power management requirements. This means I2C Primer and PMBus are compatible and interoperable in terms of electrical requirements and command semantics.

One of the basic parameters of power management is overvoltage level monitoring. PMBus provides commands to set and read this value. PMBus can be attached to I2The existing features of C Primer and SMBus act as a protocol layer on top of existing standards (especially SMBus).

I2The C specification only describes the physical layer, timing, and flow control of the 2-wire bus. I2The C specification does not (like the SMBus protocol) describe the format of the message, nor does it describe the content of the message.

The PMBus specification is a complete power management protocol. It explains how to transfer bits and bytes from one device to another (that is, transfer). It also describes a command language that gives meaning to these bits and bytes.

Addressing

For redundant systems, once the power supply is installed in the system, there are up to three signals to set the address location of the power supply: address 2, address 1, and address 0. For non-redundant systems, the power supply device address location should be B0h.

hardware

For I-based2CVDDPower supply and drive (for VDD = 3.3 V), the devices in the power supply should be compatible with the SMBus 2.0 high power specification. This bus should run at 3.3 V.

power supply

The circuit inside the power supply should obtain power from the standby output. For redundant power supplies, the device should be powered from the system side of the “logic OR” device. As long as the power supply or parallel redundant power supply in the system is connected to the AC power supply, the PMBus device should be in the on state.

Pull-up resistor

Only weak pull-up resistors can be used on the SCL or SDA lines inside the power supply. The main pull-up resistor is provided by the system and can be connected to 3.3 V or 5 V. For the system design, the main pull-up resistor should be located outside the power supply and draw power from the backup power rail.

Data speed

The PMBus device in the power supply should run at 100 kbps SMBus at full speed, and avoid clock stretching as much as possible because it will slow down the bus.

Summarize

Table 8 summarizes and summarizes I2C Primer, SMBus (high power and low power), PMBus signal, timing and electrical specifications.

I2What is the relationship between C Primer, SMBus and PMBus?

SMBus was originally developed to assist in battery management systems, using I2C hardware, but the second level of software is added, which finally allows the device to be hot-plugged without restarting the system. PMBus extends SMBus and defines a set of device commands specifically used to manage power converters, exposing the device’s properties such as measured voltage, current, and temperature. Generally speaking, I2C Primer, SMBus and PMBus devices can share the bus without major problems.

I2C. Advantages of SMB and PMB

● Only use two wires

● With ACK⁄NACK bit

● Well-known agreement

● Support multiple master devices and multiple nodes

● The hardware is not as complicated as UART

● Widely used method

shortcoming

● Data transfer rate is slower than SPI

● The size of the data frame is limited to 8 bits

● The hardware required for implementation is more complex than SPI

I2C communication protocol: understand I2C Primer, PMBus and SMBus

Figure 20. SMBus timing measurement

Table 7. PMBus addressing

I2C communication protocol: understand I2C Primer, PMBus and SMBus

Example

● Sensor reading

● Sensor write

● EEPROM, temperature sensor, touch screen, proximity sensor

● Transmission and control of user-guided operations

● Communicate with multiple microcontrollers

● Consumer electronic equipment

● System Management

● Power management

● Debug

Table 8. I2C Primer, SMBus and PMBus specifications summary

I2C communication protocol: understand I2C Primer, PMBus and SMBus

I2C communication protocol: understand I2C Primer, PMBus and SMBus

Reference circuit

“I2The advantages and limitations of C communication”. Total Phase, August 2016.

Afzal, Sal. “I2C Primer: What is I2C? (Part One)”. Analog Devices.

Afzal, Sal. “I2C Timing: Definition and Specification Guide (Part 2)”. Analog Devices.

Campbell, Scott. “I2C communication protocol foundation”. Circuit Basics.

“I2C Quick Guide”. ADI.

“I2What is C? “I2C bus.

The Links:   PN100RL1B060 6DI75MA-050

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