How to increase ADC dynamic range by channel sum

A common technique to increase the dynamic range of an audio converter system is to operate two converter channels in parallel using the same signal and output sum. The sum of correlated signals increases the signal level by 6 dB, while the sum of uncorrelated noise sources only increases the noise level by 3 dB.

Author: Cirrus Logic

A common technique to increase the dynamic range of an audio converter system is to operate two converter channels in parallel using the same signal and output sum. The sum of correlated signals increases the signal level by 6 dB, while the sum of uncorrelated noise sources only increases the noise level by 3 dB.

CS5381 implementation requirements

The block diagram shown in Figure 1 shows the implementation of the CS5381 A/D. Please note that the same analog signal is applied to each A/D converter in the CS5381. Then perform the required mathematical operations in a digital signal processor (DSP) or field programmable gate array (FGPA).

It should be noted that addition (or subtraction) must be performed using synchronized sampling and time-aligned data pairs. In the serial audio interface, the left and right channel data pairs are synchronously sampled data. However, the right channel data pair and the left channel data pair are offset in time by one sampling period relative to each other, and the addition or subtraction of these pairs will produce erroneous results.

How to increase ADC dynamic range by channel sum
Single-mode block diagram

CS5381 Recommended Analog Input Buffer in Mono Mode The implementation of CS5381 requires a separate input buffer stage for differential analog input. It has been proven that a single buffer driving two differential inputs can cause unacceptable levels of distortion. The recommended buffer topology is almost the same as that shown on the CS5381 evaluation board CDB5381. The schematic diagram in Figure 2 is the proposed buffer implementation of the equation eo = A/2 + B/2.

How to increase ADC dynamic range by channel sum
CS5381 recommended non-inverting configuration buffer implementation

Demonstration technology

Using standard Cirrus Logic evaluation boards and Audio Precision System 2 assembly test system to demonstrate the technology is a relatively simple matter. The block diagram in Figure 3 shows a test setup including CDB5381 and CRD43530, evaluating the CS5381 A/D and CS495313 audio DSP boards. Audio Precision System 2 is the source of analog signals and an analysis tool used to generate performance data and graphs. The digital interconnection between the evaluation board and Audio Precision System 2 is a standard S/PDIF (IEC-60958) interface. The evaluation was performed at a 48 kHz sampling rate, but the performance improvement was effective at all sampling rates.

How to increase ADC dynamic range by channel sum
Block diagram of test system

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