“In the field of automated testing, the single-chip test system has been more and more widely used by virtue of its mature application system, simple system structure and excellent cost performance. In recent years, with the continuous emergence of new test objects and the continuous development of test methods, the functions of the test system have become more and more complete, and the requirements for the test system in various applications have also increased. Most of the current test systems not only have to complete the real-time measurement and control tasks of the industrial field, but also further realize the real-time processing and storage of test data.
In the field of automated testing, the single-chip test system has been more and more widely used by virtue of its mature application system, simple system structure and excellent cost performance. In recent years, with the continuous emergence of new test objects and the continuous development of test methods, the functions of the test system have become more and more complete, and the requirements for the test system in various applications have also increased. Most of the current test systems not only have to complete the real-time measurement and control tasks of the industrial field, but also further realize the real-time processing and storage of test data. In the past, in the general single-chip test system, the amount of information storage was not large, and the system only needed less resources to realize the storage of data. However, with the continuous development of memory chip technology, memory chips suitable for single-chip microcomputer systems can already save hundreds of KB or even several MB of data under power-off protection; similarly, the current single-chip microcomputer test system is also facing frequent processing and storage. Thousands or even nearly 10,000 test data problems. This is a rather complicated task for a general single-chip microcomputer test system that lacks operating system support. Therefore, current test systems can only process specific numerical objects and adopt simple sequential storage methods for large amounts of collected data. Obviously, this method lacks flexibility, is not conducive to the single-chip test system to process a large amount of test data, and limits the development of the test system in this regard.
This article focuses on a type of test system that handles a large amount of test data, and discusses the storage and management of test data. This type of test system is usually composed of a single-chip microcomputer with strong anti-interference ability and a large-capacity, power-off protection memory chip, and is equipped with a high-digital sensor; it is cheap and has stable performance, suitable for working in industrial sites, storing and processing a large number of tests Some of the data can even form a measurement and control network with the host computer to complete more complex test tasks. This article will introduce a chain storage method applied to the single-chip microcomputer test system, which can realize the storage and management of a large amount of test data while performing real-time measurement and control in the industrial field, and has achieved good results in practical applications.
The storage structure in the large-capacity single-chip microcomputer test system
In most automatic test systems, the logical structure of the test data generally follows a linear logical relationship, that is, the data elements are only in sequence in time or space order without upper and lower levels. Therefore, the sequential storage structure is often used when designing the storage structure, which has the advantage of fast processing speed and simple structure when processing linear data structures.
However, the above situation is not universally applicable in the large-capacity test system described above. Although the large-capacity test system also has a linear logic structure, its test data varies widely, and the internal structure of the data elements is also very complicated. In addition, the system has to perform multiple instruction operations such as data storage and data query. If the sequential storage structure is applied Will face many problems.
First of all, the test system often faces some special test objects. The test information is more complicated and the data length is not fixed, which is obviously not conducive to adopting a sequential storage structure. Assuming that the system performs sequential storage in a logical order in time or space, the allocation of storage space will become a difficult problem. If the allocated space is too large, storage efficiency will be affected; otherwise, data overflow will occur. Similarly, assuming that the system can arrange data storage space, the system will also appear to be unable to perform operations such as data query and data deletion.
Second, the sequential storage structure cannot handle abstract data types well. The system must consider the length and content of data elements when performing operations such as data storage, data query, and data deletion, which cannot be flexible and effective. When the system needs to be modified or upgraded, the modification of the internal structure of the data elements will affect the overall operation of the system, thereby reducing the reliability and efficiency of the system, and at the same time making the system maintenance and upgrade more difficult.
To sum up, the sequential storage structure cannot solve all the problems faced by the large-capacity test system when storing and managing data. Therefore, the application of non-sequential storage structure must be considered in actual operation. For a long time, non-sequential storage structures such as chain storage structures have been seldom used in single-chip microcomputer systems. The reason is that chain storage structures must be supported by a set of specialized storage management systems. In general-purpose computers, this function is realized by the operating system or language compiling system, but there is no mature application in the ordinary single-chip system, which makes the program design more difficult. The following introduces a storage management system applied to a large-capacity single-chip microcomputer system, which can support the application chain storage method of a large-capacity single-chip test system.
Storage management system for large-capacity test system
For a large-capacity test system using a chain storage structure, the physical address of each node in the linked list is not fixed. In order to avoid storage space conflicts that may occur when saving data, a special storage management system needs to be established to manage the development and release of storage space. Among them, the data guide table is the basis of the storage management system and is responsible for recording the storage information of each data element in the storage space. Utilizing the data guide table and cooperating with functions such as opening up space and releasing space, the test system can realize effective management of a large amount of storage space.
Data guide table
Establishing the data guide table is to establish a connection between each node in the linked list and its corresponding physical address, and regulate the use of storage space by each node. In the test system, the boot table only occupies a fixed area divided in the storage space, and its record object is the first address and the last address of a continuous address space that has been allocated and occupied, marking a certain node stored in the storage space The size of the allocated space is called a “record”. Each physical address recorded in the boot table is continuous and arranged in order according to the size of the first address of each record. The working principle of the data guide table is shown in Figure 1.
Figure 1 Schematic diagram of the working principle of the data guidance table
In the initial state, the memory boot table has only 2 records, indicating the first address and the last address of the entire storage space. At this time, the entire page space does not store any test data. Once a new node needs to be stored in this space, the CPU will open up a continuous storage area for the node for its use, and write the first and last addresses of the space as a record into the memory boot table . Similarly, when the system needs to delete a node in a linked list on a certain page, the CPU deletes its corresponding record in the memory boot table to release this address space. It is worth noting that for the part of the storage space that is released in the boot table, the saved content is not really deleted; before the new data overwrites the address, the CPU can still read the stored data by directly accessing the address .
Functions for managing storage space
Generally speaking, the standard library functions malloc(), realloc() and free() in the C language are often used in general-purpose computers to allocate and manage storage space, but this method is not suitable for general large-capacity test systems. Inappropriate.
Suppose that in the large-capacity test system described above, the system uses a 16-bit address single-chip microcomputer, and uses the paging memory mode to access the 512KB power-down protection memory. Divide the memory into 16 pages (00H～0FH), each page address is 0000H～7FFFFH, a total of 32KB. At this time, the system can use malloc() to open up a section of storage space in the unused space, but the address pointer returned by this function is random, and it is possible to allocate the space in an interval that the system cannot recognize (such as 7FFFH ~ FFFFH), so Can’t meet the needs. In addition, because the memory in the system has a power-down protection function, the CPU will not be able to identify the storage space of the saved test data after power-on again, which makes the malloc() function meaningless. Therefore, the storage space management function is still established based on the data guide table. The realization of its specific functions depends on the function’s operation on each record in the data guidance table. The procedure is as follows:
void *m_alloc (uintsize, ucharpage)//A function to open up storage space
void *m_free(voidxdata*p_free, ucharpage)//The function to release the opened storage space
void *re_alloc(voidxdata*p_re, uintsize, ucharpage) // function to reopen storage space
Take the m_alloc() function as an example, and its program flow chart is shown in Figure 2.
Figure 2 The program flow of opening up the storage space function m_alloc()
When the system needs to open up storage space for a node, first give the specified storage space page page and the length of the space that needs to be opened up size, and then use the m_alloc() function to query whether there is suitable storage space in the boot table of the corresponding page . Since each record in the boot table represents a continuous address range that has been allocated, the m_alloc() function will start from records to determine whether the length of the unallocated space between each two adjacent records meets the needs of the system. When a pair of records meets the conditions, the m_alloc() function will return the pointer of the first address of the unallocated storage space (that is, the last address of the previous record), and insert the new space section of the open space between the two records. record. If all the records in the page guide table do not meet the conditions, the m_alloc() function returns a null pointer. The re_alloc() function and the m_free() function respectively complete the operations of reallocating a section of storage space at the specified first address and deleting a section of storage space at the specified first address. Its function and usage are similar to m_alloc(), so I won’t repeat it.
Application of chain storage structure and storage management system in actual operation
The storage management system described above can realize the application of the chain storage structure in a large-capacity test system. The advantage of this is that it can effectively simplify the process of system storage of data, facilitate the execution of multiple instruction operations, and increase system storage space Utilization rate.
SF6 density relay calibration system
As shown in Figure 3, the SF6 density relay calibration system is composed of 51 series single-chip microcomputer, 512KB power failure protection memory, printer, clock system and LCD. It is equipped with high digital pressure sensor and temperature sensor, which can communicate with the host computer through the 485 bus. Communication. The system can calibrate different types of density relays, meet the needs of various rated parameters and the number of contacts, and realize real-time Display and print data during the calibration process; multiple sets of calibration data can be saved for the same relay , It can save more than 4000 pieces of verification data; all verification records can be inquired at any time; in addition, when communicating with the upper computer, there is corresponding upper computer software for data transmission and storage of the lower computer system Operations such as spatial query and data deletion.
Figure 3 Block diagram of SF6 density relay calibration system structure
Specifically, the SF6 density relay calibration system uses SF6 density relays as the calibration object. The calibration results include the pressure and temperature values of SF6 gas. Therefore, the calibration results of each calibration object are abstracted as a data element, respectively Including the test information of the calibration object (such as the test date, the test serial number of the relay, the number of contacts, and the rated parameter information) and one or more sets of measured value information (such as the number of calibrations, alarms, lockout 1, lockout 2, overrun The pressure value and temperature value at the time of pressing contact action and return respectively). The system establishes a chain storage structure with each data element as a node, and manages the allocation of storage space through the above-mentioned management storage system, so that it can not only ensure effective and reasonable storage of verification data, but also realize data query well. , Data deletion and communication with the host computer, etc., make the operation of the system more efficient and reliable.
Automatic test system of non-linear logic structure
When the automatic test system is faced with data elements with a non-linear logical structure, it must adopt a non-sequential storage structure to save the data. At this time, chain storage structure, or index storage structure and binary tree and other non-sequential storage structures can be considered, but the premise The conditions are to have a set of dedicated storage management system to support.
With the above-mentioned storage management system as the foundation, the application of various non-sequential storage structures becomes possible. When designing the system, fully weighing the utilization of storage space and the time spent by the algorithm, it is possible to apply a variety of storage structures and design corresponding algorithms to meet the requirements of various test objects and test environments.
Saving data in the form of a chain structure and managing the storage space through the data guide table is a new data storage and management method applied to the large-capacity single-chip test system.
This storage method is suitable for both linear logic structure test system and non-linear logic structure test system. In general, it makes the single-chip microcomputer system faster and more convenient when processing multiple complex data and repeated operations such as saving, querying and deleting. The utilization rate of the limited capacity storage space; at the same time, the structured data storage makes the maintenance and upgrade of the system easier, and realizes the structured management of the system.